Within the semiconductor industry, there are numerous applications that require bonding a semiconductor wafer to a second wafer or glass substrate. As an example, a microelectromechanical system (MEMS) device formed in or on a semiconductor wafer (referred to herein as a device wafer) is often capped by a semiconductor or glass wafer (referred to herein as a capping wafer), forming a package that defines a cavity within which the MEMS device is enclosed and protected. Examples of MEMS devices protected in this manner include accelerometers, rate sensors, actuators, pressure sensors, etc. By the very nature of their operation, MEMS devices must be free to move to some degree, necessitating that the seal between the wafers is sufficient to exclude foreign matter from the cavity. Certain MEMS devices, such as absolute pressure sensors, further require that the cavity be evacuated and hermetically sealed. The performance of motion sensors with resonating micromachined components also generally benefit if the cavity is evacuated so that the micromachined components operate in a vacuum. A hermetical seal also ensures that moisture is excluded from the cavity, which might otherwise form ice crystals at low temperatures that could impede motion of the MEMS device.
In view of the above, the integrity of the bond that secures the capping wafer to the device wafer is essential to the performance and life of the enclosed MEMS device. Various bonding techniques have been used for the purpose of maximizing the strength and reliability of the wafer bond, as well as various intermediate bonding materials, including adhesives, solders, and dielectrics such as glass frit. Silicon direct and anodic bonding techniques that do not require an intermediate material have also been used. As would be expected, each of these bonding techniques can be incompatible or less than ideal for certain applications. Silicon direct and anodic bonding methods require very smooth bonding surfaces, and therefore cannot produce a vacuum seal when trench isolation or unplanarized metal crossunders are employed on the device wafer, such as to electrically interconnect a MEMS device to bond pads outside the vacuum-sealed cavity of the package. In contrast, intermediate bonding materials such as glass frit are able to form suitable bonds with deposited layers, runners and other surface discontinuities often found on device wafers.
Glass frit bonding materials used for wafer bonding are often deposited by a screen printing technique, in which case the material is deposited as a paste that contains a glass frit, a thixotropic binder, and a solvent for the binder. The proportions of glass frit, binder and solvent are adjusted to allow screen printing of a controlled volume of the paste on a designated bonding surface of one of the wafers, typically on the capping wafer. After firing to remove the binder and solvent, the capping and device wafers are aligned and then mated so that the remaining glass frit particles (bonded together as a result of the firing operation) contact a complementary bonding surface of the second (e.g., device) wafer. The wafers are then heated to melt the glass frit (e.g., about 425° C), so that on cooling the glass frit material resolidifies to form a substantially homogeneous glass bond line between the wafers.
While a certain bond line width is necessary to form a sufficiently strong wafer bond, minimizing the width of the bond line is desirable from the standpoint of reducing the chip size, which in turn enables the maximum number of chips to be fabricated on a wafer slice. The minimum width and volume of a screen printed glass bond line is not typically limited by concerns for bond strength, but by the capability of the screen printing process. Because of an unacceptable variability of screening processes when thin and narrow lines of paste are printed, the volume of glass frit paste printed is typically greater than that required to effect a reliable hermetic wafer bond. To control the “stand-off” distance between wafers, the final thickness of the glass bond line may be established by “stand-offs” micromachined in one of the wafers. When the capping and device wafers are mated, pressure is applied to bring the stand-offs into contact with the surface of the device wafer, thus physically establishing the wafer spacing. Consequently, both wafers must have surfaces dedicated to accommodating the stand-offs, increasing the chip size. The excess bond material is forced outward relative to the original printed bond line, leading to a relatively wide bond line that must be accommodated by the respective bonding surfaces oil the wafers. As a result, relatively wide bond lines and micromachined stand-offs associated with current glass bonding techniques have artificially limited the size to which wafer bonded chip packages can be reduced.
In view of the above, it would be desirable if an improved wafer bonding process were available that could reduce the widths of the wafer bonding surfaces in order to maximize the chip multiple per wafer slice. It would be further desirable if such a process could simplify wafer fabrication while reducing package cost.